001 // Copyright (c) National Instruments 2009. All Rights Reserved.
002 // Do Not Edit... this file is generated!
003
004 package edu.wpi.first.wpilibj.fpga;
005
006 import com.ni.rio.*;
007
008 public class tDIO extends tSystem
009 {
010
011 public tDIO(final int sys_index)
012 {
013 super();
014 m_SystemIndex = sys_index;
015 if (status.isNotFatal() && m_SystemIndex >= kNumSystems)
016 {
017 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
018 }
019
020 }
021
022 protected void finalize()
023 {
024 super.finalize();
025 }
026
027 public int getSystemIndex()
028 {
029 return m_SystemIndex;
030 }
031
032 public static final int kNumSystems = 2;
033 public final int m_SystemIndex;
034
035
036
037
038
039
040
041
042
043
044
045
046
047
048
049
050
051
052
053
054
055
056 //////////////////////////////////////////////////////////////////////////////////////////////////
057 // Accessors for FilterSelect
058 //////////////////////////////////////////////////////////////////////////////////////////////////
059 public static final int kFilterSelect_NumElements = 16;
060 public static final int kFilterSelect_ElementSize = 2;
061 public static final int kFilterSelect_ElementMask = 0x3;
062 private static final int kDIO0_FilterSelect_Address = 0x8268;
063 private static final int kDIO1_FilterSelect_Address = 0x82D4;
064 private static final int kFilterSelect_Addresses [] =
065 {
066 kDIO0_FilterSelect_Address,
067 kDIO1_FilterSelect_Address,
068 };
069
070 public void writeFilterSelect(final int bitfield_index, final int value)
071 {
072 if (status.isNotFatal() && bitfield_index >= kFilterSelect_NumElements)
073 {
074 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
075 }
076
077 int regValue = NiFpga.readU32(m_DeviceHandle, kFilterSelect_Addresses[m_SystemIndex], status);
078 regValue &= ~(kFilterSelect_ElementMask << ((kFilterSelect_NumElements - 1 - bitfield_index) * kFilterSelect_ElementSize));
079 regValue |= ((value & kFilterSelect_ElementMask) << ((kFilterSelect_NumElements - 1 - bitfield_index) * kFilterSelect_ElementSize));
080 NiFpga.writeU32(m_DeviceHandle, kFilterSelect_Addresses[m_SystemIndex], regValue, status);
081 }
082 public byte readFilterSelect(final int bitfield_index)
083 {
084 if (status.isNotFatal() && bitfield_index >= kFilterSelect_NumElements)
085 {
086 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
087 }
088
089 int result = NiFpga.readU32(m_DeviceHandle, kFilterSelect_Addresses[m_SystemIndex], status);
090 int arrayElementValue = ((result)
091 >>> ((kFilterSelect_NumElements - 1 - bitfield_index) * kFilterSelect_ElementSize)) & kFilterSelect_ElementMask;
092 return (byte)((arrayElementValue) & 0x00000003);
093 }
094
095 //////////////////////////////////////////////////////////////////////////////////////////////////
096 // Accessors for I2CDataToSend
097 //////////////////////////////////////////////////////////////////////////////////////////////////
098 private static final int kDIO0_I2CDataToSend_Address = 0x8240;
099 private static final int kDIO1_I2CDataToSend_Address = 0x82AC;
100 private static final int kI2CDataToSend_Addresses [] =
101 {
102 kDIO0_I2CDataToSend_Address,
103 kDIO1_I2CDataToSend_Address,
104 };
105
106 public void writeI2CDataToSend(final long value)
107 {
108
109 NiFpga.writeU32(m_DeviceHandle, kI2CDataToSend_Addresses[m_SystemIndex], (int)(value), status);
110 }
111 public long readI2CDataToSend()
112 {
113
114 return (long)((NiFpga.readU32(m_DeviceHandle, kI2CDataToSend_Addresses[m_SystemIndex], status)) & 0xFFFFFFFFl);
115 }
116
117 //////////////////////////////////////////////////////////////////////////////////////////////////
118 // Accessors for DO
119 //////////////////////////////////////////////////////////////////////////////////////////////////
120 private static final int kDIO0_DO_Address = 0x8208;
121 private static final int kDIO1_DO_Address = 0x8274;
122 private static final int kDO_Addresses [] =
123 {
124 kDIO0_DO_Address,
125 kDIO1_DO_Address,
126 };
127
128 public void writeDO(final int value)
129 {
130
131 NiFpga.writeU32(m_DeviceHandle, kDO_Addresses[m_SystemIndex], value, status);
132 }
133 public int readDO()
134 {
135
136 return (int)((NiFpga.readU32(m_DeviceHandle, kDO_Addresses[m_SystemIndex], status)) & 0x0000FFFF);
137 }
138
139 //////////////////////////////////////////////////////////////////////////////////////////////////
140 // Accessors for FilterPeriod
141 //////////////////////////////////////////////////////////////////////////////////////////////////
142 public static final int kFilterPeriod_NumElements = 3;
143 public static final int kFilterPeriod_ElementSize = 8;
144 public static final int kFilterPeriod_ElementMask = 0xFF;
145 private static final int kDIO0_FilterPeriod_Address = 0x8264;
146 private static final int kDIO1_FilterPeriod_Address = 0x82D0;
147 private static final int kFilterPeriod_Addresses [] =
148 {
149 kDIO0_FilterPeriod_Address,
150 kDIO1_FilterPeriod_Address,
151 };
152
153 public void writeFilterPeriod(final int bitfield_index, final int value)
154 {
155 if (status.isNotFatal() && bitfield_index >= kFilterPeriod_NumElements)
156 {
157 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
158 }
159
160 int regValue = NiFpga.readU32(m_DeviceHandle, kFilterPeriod_Addresses[m_SystemIndex], status);
161 regValue &= ~(kFilterPeriod_ElementMask << ((kFilterPeriod_NumElements - 1 - bitfield_index) * kFilterPeriod_ElementSize));
162 regValue |= ((value & kFilterPeriod_ElementMask) << ((kFilterPeriod_NumElements - 1 - bitfield_index) * kFilterPeriod_ElementSize));
163 NiFpga.writeU32(m_DeviceHandle, kFilterPeriod_Addresses[m_SystemIndex], regValue, status);
164 }
165 public short readFilterPeriod(final int bitfield_index)
166 {
167 if (status.isNotFatal() && bitfield_index >= kFilterPeriod_NumElements)
168 {
169 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
170 }
171
172 int result = NiFpga.readU32(m_DeviceHandle, kFilterPeriod_Addresses[m_SystemIndex], status);
173 int arrayElementValue = ((result)
174 >>> ((kFilterPeriod_NumElements - 1 - bitfield_index) * kFilterPeriod_ElementSize)) & kFilterPeriod_ElementMask;
175 return (short)((arrayElementValue) & 0x000000FF);
176 }
177
178 //////////////////////////////////////////////////////////////////////////////////////////////////
179 // Accessors for OutputEnable
180 //////////////////////////////////////////////////////////////////////////////////////////////////
181 private static final int kDIO0_OutputEnable_Address = 0x8210;
182 private static final int kDIO1_OutputEnable_Address = 0x827C;
183 private static final int kOutputEnable_Addresses [] =
184 {
185 kDIO0_OutputEnable_Address,
186 kDIO1_OutputEnable_Address,
187 };
188
189 public void writeOutputEnable(final int value)
190 {
191
192 NiFpga.writeU32(m_DeviceHandle, kOutputEnable_Addresses[m_SystemIndex], value, status);
193 }
194 public int readOutputEnable()
195 {
196
197 return (int)((NiFpga.readU32(m_DeviceHandle, kOutputEnable_Addresses[m_SystemIndex], status)) & 0x0000FFFF);
198 }
199
200 //////////////////////////////////////////////////////////////////////////////////////////////////
201 // Accessors for Pulse
202 //////////////////////////////////////////////////////////////////////////////////////////////////
203 private static final int kDIO0_Pulse_Address = 0x825C;
204 private static final int kDIO1_Pulse_Address = 0x82C8;
205 private static final int kPulse_Addresses [] =
206 {
207 kDIO0_Pulse_Address,
208 kDIO1_Pulse_Address,
209 };
210
211 public void writePulse(final int value)
212 {
213
214 NiFpga.writeU32(m_DeviceHandle, kPulse_Addresses[m_SystemIndex], value, status);
215 }
216 public int readPulse()
217 {
218
219 return (int)((NiFpga.readU32(m_DeviceHandle, kPulse_Addresses[m_SystemIndex], status)) & 0x0000FFFF);
220 }
221
222 //////////////////////////////////////////////////////////////////////////////////////////////////
223 // Accessors for SlowValue
224 //////////////////////////////////////////////////////////////////////////////////////////////////
225 private static final int kSlowValue_RelayFwd_BitfieldMask = 0x000FF000;
226 private static final int kSlowValue_RelayFwd_BitfieldOffset = 12;
227 private static final int kSlowValue_RelayRev_BitfieldMask = 0x00000FF0;
228 private static final int kSlowValue_RelayRev_BitfieldOffset = 4;
229 private static final int kSlowValue_I2CHeader_BitfieldMask = 0x0000000F;
230 private static final int kSlowValue_I2CHeader_BitfieldOffset = 0;
231 private static final int kDIO0_SlowValue_Address = 0x8254;
232 private static final int kDIO1_SlowValue_Address = 0x82C0;
233 private static final int kSlowValue_Addresses [] =
234 {
235 kDIO0_SlowValue_Address,
236 kDIO1_SlowValue_Address,
237 };
238
239 public void writeSlowValue(final int value)
240 {
241
242 NiFpga.writeU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], value, status);
243 }
244 public void writeSlowValue_RelayFwd(final int value)
245 {
246
247 int regValue = NiFpga.readU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], status);
248 regValue &= ~kSlowValue_RelayFwd_BitfieldMask;
249 regValue |= ((value) << kSlowValue_RelayFwd_BitfieldOffset) & kSlowValue_RelayFwd_BitfieldMask;
250 NiFpga.writeU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], regValue, status);
251 }
252 public void writeSlowValue_RelayRev(final int value)
253 {
254
255 int regValue = NiFpga.readU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], status);
256 regValue &= ~kSlowValue_RelayRev_BitfieldMask;
257 regValue |= ((value) << kSlowValue_RelayRev_BitfieldOffset) & kSlowValue_RelayRev_BitfieldMask;
258 NiFpga.writeU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], regValue, status);
259 }
260 public void writeSlowValue_I2CHeader(final int value)
261 {
262
263 int regValue = NiFpga.readU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], status);
264 regValue &= ~kSlowValue_I2CHeader_BitfieldMask;
265 regValue |= ((value) << kSlowValue_I2CHeader_BitfieldOffset) & kSlowValue_I2CHeader_BitfieldMask;
266 NiFpga.writeU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], regValue, status);
267 }
268 public int readSlowValue()
269 {
270
271 int result = NiFpga.readU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], status);
272 int regValue = result ;
273 return (int)(regValue);
274 }
275 public short readSlowValue_RelayFwd()
276 {
277
278 int result = NiFpga.readU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], status);
279 int regValue = result ;
280 int bitfieldValue = ((regValue & kSlowValue_RelayFwd_BitfieldMask) >>> kSlowValue_RelayFwd_BitfieldOffset);
281 return (short)((bitfieldValue) & 0x000000FF);
282 }
283 public short readSlowValue_RelayRev()
284 {
285
286 int result = NiFpga.readU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], status);
287 int regValue = result ;
288 int bitfieldValue = ((regValue & kSlowValue_RelayRev_BitfieldMask) >>> kSlowValue_RelayRev_BitfieldOffset);
289 return (short)((bitfieldValue) & 0x000000FF);
290 }
291 public byte readSlowValue_I2CHeader()
292 {
293
294 int result = NiFpga.readU32(m_DeviceHandle, kSlowValue_Addresses[m_SystemIndex], status);
295 int regValue = result ;
296 int bitfieldValue = ((regValue & kSlowValue_I2CHeader_BitfieldMask) >>> kSlowValue_I2CHeader_BitfieldOffset);
297 return (byte)((bitfieldValue) & 0x0000000F);
298 }
299
300 //////////////////////////////////////////////////////////////////////////////////////////////////
301 // Accessors for I2CStatus
302 //////////////////////////////////////////////////////////////////////////////////////////////////
303 private static final int kI2CStatus_Transaction_BitfieldMask = 0x04000000;
304 private static final int kI2CStatus_Transaction_BitfieldOffset = 26;
305 private static final int kI2CStatus_Done_BitfieldMask = 0x02000000;
306 private static final int kI2CStatus_Done_BitfieldOffset = 25;
307 private static final int kI2CStatus_Aborted_BitfieldMask = 0x01000000;
308 private static final int kI2CStatus_Aborted_BitfieldOffset = 24;
309 private static final int kI2CStatus_DataReceivedHigh_BitfieldMask = 0x00FFFFFF;
310 private static final int kI2CStatus_DataReceivedHigh_BitfieldOffset = 0;
311 private static final int kDIO0_I2CStatus_Address = 0x8250;
312 private static final int kDIO1_I2CStatus_Address = 0x82BC;
313 private static final int kI2CStatus_Addresses [] =
314 {
315 kDIO0_I2CStatus_Address,
316 kDIO1_I2CStatus_Address,
317 };
318
319 public int readI2CStatus()
320 {
321
322 int result = NiFpga.readU32(m_DeviceHandle, kI2CStatus_Addresses[m_SystemIndex], status);
323 int regValue = result ;
324 return (int)(regValue);
325 }
326 public byte readI2CStatus_Transaction()
327 {
328
329 int result = NiFpga.readU32(m_DeviceHandle, kI2CStatus_Addresses[m_SystemIndex], status);
330 int regValue = result ;
331 int bitfieldValue = ((regValue & kI2CStatus_Transaction_BitfieldMask) >>> kI2CStatus_Transaction_BitfieldOffset);
332 return (byte)((bitfieldValue) & 0x00000001);
333 }
334 public boolean readI2CStatus_Done()
335 {
336
337 int result = NiFpga.readU32(m_DeviceHandle, kI2CStatus_Addresses[m_SystemIndex], status);
338 int regValue = result ;
339 int bitfieldValue = ((regValue & kI2CStatus_Done_BitfieldMask) >>> kI2CStatus_Done_BitfieldOffset);
340 return ((bitfieldValue) != 0 ? true : false);
341 }
342 public boolean readI2CStatus_Aborted()
343 {
344
345 int result = NiFpga.readU32(m_DeviceHandle, kI2CStatus_Addresses[m_SystemIndex], status);
346 int regValue = result ;
347 int bitfieldValue = ((regValue & kI2CStatus_Aborted_BitfieldMask) >>> kI2CStatus_Aborted_BitfieldOffset);
348 return ((bitfieldValue) != 0 ? true : false);
349 }
350 public int readI2CStatus_DataReceivedHigh()
351 {
352
353 int result = NiFpga.readU32(m_DeviceHandle, kI2CStatus_Addresses[m_SystemIndex], status);
354 int regValue = result ;
355 int bitfieldValue = ((regValue & kI2CStatus_DataReceivedHigh_BitfieldMask) >>> kI2CStatus_DataReceivedHigh_BitfieldOffset);
356 return (int)((bitfieldValue) & 0x00FFFFFF);
357 }
358
359 //////////////////////////////////////////////////////////////////////////////////////////////////
360 // Accessors for I2CDataReceived
361 //////////////////////////////////////////////////////////////////////////////////////////////////
362 private static final int kDIO0_I2CDataReceived_Address = 0x824C;
363 private static final int kDIO1_I2CDataReceived_Address = 0x82B8;
364 private static final int kI2CDataReceived_Addresses [] =
365 {
366 kDIO0_I2CDataReceived_Address,
367 kDIO1_I2CDataReceived_Address,
368 };
369
370 public long readI2CDataReceived()
371 {
372
373 return (long)((NiFpga.readU32(m_DeviceHandle, kI2CDataReceived_Addresses[m_SystemIndex], status)) & 0xFFFFFFFFl);
374 }
375
376 //////////////////////////////////////////////////////////////////////////////////////////////////
377 // Accessors for DI
378 //////////////////////////////////////////////////////////////////////////////////////////////////
379 private static final int kDIO0_DI_Address = 0x820C;
380 private static final int kDIO1_DI_Address = 0x8278;
381 private static final int kDI_Addresses [] =
382 {
383 kDIO0_DI_Address,
384 kDIO1_DI_Address,
385 };
386
387 public int readDI()
388 {
389
390 return (int)((NiFpga.readU32(m_DeviceHandle, kDI_Addresses[m_SystemIndex], status)) & 0x0000FFFF);
391 }
392
393 //////////////////////////////////////////////////////////////////////////////////////////////////
394 // Accessors for PulseLength
395 //////////////////////////////////////////////////////////////////////////////////////////////////
396 private static final int kDIO0_PulseLength_Address = 0x8260;
397 private static final int kDIO1_PulseLength_Address = 0x82CC;
398 private static final int kPulseLength_Addresses [] =
399 {
400 kDIO0_PulseLength_Address,
401 kDIO1_PulseLength_Address,
402 };
403
404 public void writePulseLength(final int value)
405 {
406
407 NiFpga.writeU32(m_DeviceHandle, kPulseLength_Addresses[m_SystemIndex], value, status);
408 }
409 public short readPulseLength()
410 {
411
412 return (short)((NiFpga.readU32(m_DeviceHandle, kPulseLength_Addresses[m_SystemIndex], status)) & 0x000000FF);
413 }
414
415 //////////////////////////////////////////////////////////////////////////////////////////////////
416 // Accessors for PWMPeriodScale
417 //////////////////////////////////////////////////////////////////////////////////////////////////
418 public static final int kPWMPeriodScale_NumElements = 10;
419 public static final int kPWMPeriodScale_ElementSize = 2;
420 public static final int kPWMPeriodScale_ElementMask = 0x3;
421 private static final int kDIO0_PWMPeriodScale_Address = 0x823C;
422 private static final int kDIO1_PWMPeriodScale_Address = 0x82A8;
423 private static final int kPWMPeriodScale_Addresses [] =
424 {
425 kDIO0_PWMPeriodScale_Address,
426 kDIO1_PWMPeriodScale_Address,
427 };
428
429 public void writePWMPeriodScale(final int bitfield_index, final int value)
430 {
431 if (status.isNotFatal() && bitfield_index >= kPWMPeriodScale_NumElements)
432 {
433 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
434 }
435
436 int regValue = NiFpga.readU32(m_DeviceHandle, kPWMPeriodScale_Addresses[m_SystemIndex], status);
437 regValue &= ~(kPWMPeriodScale_ElementMask << ((kPWMPeriodScale_NumElements - 1 - bitfield_index) * kPWMPeriodScale_ElementSize));
438 regValue |= ((value & kPWMPeriodScale_ElementMask) << ((kPWMPeriodScale_NumElements - 1 - bitfield_index) * kPWMPeriodScale_ElementSize));
439 NiFpga.writeU32(m_DeviceHandle, kPWMPeriodScale_Addresses[m_SystemIndex], regValue, status);
440 }
441 public byte readPWMPeriodScale(final int bitfield_index)
442 {
443 if (status.isNotFatal() && bitfield_index >= kPWMPeriodScale_NumElements)
444 {
445 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
446 }
447
448 int result = NiFpga.readU32(m_DeviceHandle, kPWMPeriodScale_Addresses[m_SystemIndex], status);
449 int arrayElementValue = ((result)
450 >>> ((kPWMPeriodScale_NumElements - 1 - bitfield_index) * kPWMPeriodScale_ElementSize)) & kPWMPeriodScale_ElementMask;
451 return (byte)((arrayElementValue) & 0x00000003);
452 }
453
454 //////////////////////////////////////////////////////////////////////////////////////////////////
455 // Accessors for DO_PWMDutyCycle
456 //////////////////////////////////////////////////////////////////////////////////////////////////
457 public static final int kDO_PWMDutyCycle_NumElements = 4;
458 public static final int kDO_PWMDutyCycle_ElementSize = 8;
459 public static final int kDO_PWMDutyCycle_ElementMask = 0xFF;
460 private static final int kDIO0_DO_PWMDutyCycle_Address = 0x826C;
461 private static final int kDIO1_DO_PWMDutyCycle_Address = 0x82D8;
462 private static final int kDO_PWMDutyCycle_Addresses [] =
463 {
464 kDIO0_DO_PWMDutyCycle_Address,
465 kDIO1_DO_PWMDutyCycle_Address,
466 };
467
468 public void writeDO_PWMDutyCycle(final int bitfield_index, final int value)
469 {
470 if (status.isNotFatal() && bitfield_index >= kDO_PWMDutyCycle_NumElements)
471 {
472 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
473 }
474
475 int regValue = NiFpga.readU32(m_DeviceHandle, kDO_PWMDutyCycle_Addresses[m_SystemIndex], status);
476 regValue &= ~(kDO_PWMDutyCycle_ElementMask << ((kDO_PWMDutyCycle_NumElements - 1 - bitfield_index) * kDO_PWMDutyCycle_ElementSize));
477 regValue |= ((value & kDO_PWMDutyCycle_ElementMask) << ((kDO_PWMDutyCycle_NumElements - 1 - bitfield_index) * kDO_PWMDutyCycle_ElementSize));
478 NiFpga.writeU32(m_DeviceHandle, kDO_PWMDutyCycle_Addresses[m_SystemIndex], regValue, status);
479 }
480 public short readDO_PWMDutyCycle(final int bitfield_index)
481 {
482 if (status.isNotFatal() && bitfield_index >= kDO_PWMDutyCycle_NumElements)
483 {
484 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
485 }
486
487 int result = NiFpga.readU32(m_DeviceHandle, kDO_PWMDutyCycle_Addresses[m_SystemIndex], status);
488 int arrayElementValue = ((result)
489 >>> ((kDO_PWMDutyCycle_NumElements - 1 - bitfield_index) * kDO_PWMDutyCycle_ElementSize)) & kDO_PWMDutyCycle_ElementMask;
490 return (short)((arrayElementValue) & 0x000000FF);
491 }
492
493 //////////////////////////////////////////////////////////////////////////////////////////////////
494 // Accessors for BFL
495 //////////////////////////////////////////////////////////////////////////////////////////////////
496 private static final int kDIO0_BFL_Address = 0x8258;
497 private static final int kDIO1_BFL_Address = 0x82C4;
498 private static final int kBFL_Addresses [] =
499 {
500 kDIO0_BFL_Address,
501 kDIO1_BFL_Address,
502 };
503
504 public void writeBFL(final boolean value)
505 {
506
507 NiFpga.writeU32(m_DeviceHandle, kBFL_Addresses[m_SystemIndex], (value ? 1 : 0), status);
508 }
509 public boolean readBFL()
510 {
511
512 return ((NiFpga.readU32(m_DeviceHandle, kBFL_Addresses[m_SystemIndex], status)) != 0 ? true : false);
513 }
514
515 //////////////////////////////////////////////////////////////////////////////////////////////////
516 // Accessors for I2CConfig
517 //////////////////////////////////////////////////////////////////////////////////////////////////
518 private static final int kI2CConfig_Address_BitfieldMask = 0x7F800000;
519 private static final int kI2CConfig_Address_BitfieldOffset = 23;
520 private static final int kI2CConfig_BytesToRead_BitfieldMask = 0x00700000;
521 private static final int kI2CConfig_BytesToRead_BitfieldOffset = 20;
522 private static final int kI2CConfig_BytesToWrite_BitfieldMask = 0x000E0000;
523 private static final int kI2CConfig_BytesToWrite_BitfieldOffset = 17;
524 private static final int kI2CConfig_DataToSendHigh_BitfieldMask = 0x0001FFFE;
525 private static final int kI2CConfig_DataToSendHigh_BitfieldOffset = 1;
526 private static final int kI2CConfig_BitwiseHandshake_BitfieldMask = 0x00000001;
527 private static final int kI2CConfig_BitwiseHandshake_BitfieldOffset = 0;
528 private static final int kDIO0_I2CConfig_Address = 0x8244;
529 private static final int kDIO1_I2CConfig_Address = 0x82B0;
530 private static final int kI2CConfig_Addresses [] =
531 {
532 kDIO0_I2CConfig_Address,
533 kDIO1_I2CConfig_Address,
534 };
535
536 public void writeI2CConfig(final int value)
537 {
538
539 NiFpga.writeU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], value, status);
540 }
541 public void writeI2CConfig_Address(final int value)
542 {
543
544 int regValue = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
545 regValue &= ~kI2CConfig_Address_BitfieldMask;
546 regValue |= ((value) << kI2CConfig_Address_BitfieldOffset) & kI2CConfig_Address_BitfieldMask;
547 NiFpga.writeU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], regValue, status);
548 }
549 public void writeI2CConfig_BytesToRead(final int value)
550 {
551
552 int regValue = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
553 regValue &= ~kI2CConfig_BytesToRead_BitfieldMask;
554 regValue |= ((value) << kI2CConfig_BytesToRead_BitfieldOffset) & kI2CConfig_BytesToRead_BitfieldMask;
555 NiFpga.writeU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], regValue, status);
556 }
557 public void writeI2CConfig_BytesToWrite(final int value)
558 {
559
560 int regValue = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
561 regValue &= ~kI2CConfig_BytesToWrite_BitfieldMask;
562 regValue |= ((value) << kI2CConfig_BytesToWrite_BitfieldOffset) & kI2CConfig_BytesToWrite_BitfieldMask;
563 NiFpga.writeU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], regValue, status);
564 }
565 public void writeI2CConfig_DataToSendHigh(final int value)
566 {
567
568 int regValue = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
569 regValue &= ~kI2CConfig_DataToSendHigh_BitfieldMask;
570 regValue |= ((value) << kI2CConfig_DataToSendHigh_BitfieldOffset) & kI2CConfig_DataToSendHigh_BitfieldMask;
571 NiFpga.writeU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], regValue, status);
572 }
573 public void writeI2CConfig_BitwiseHandshake(final boolean value)
574 {
575
576 int regValue = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
577 regValue &= ~kI2CConfig_BitwiseHandshake_BitfieldMask;
578 regValue |= (((value ? 1 : 0)) << kI2CConfig_BitwiseHandshake_BitfieldOffset) & kI2CConfig_BitwiseHandshake_BitfieldMask;
579 NiFpga.writeU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], regValue, status);
580 }
581 public int readI2CConfig()
582 {
583
584 int result = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
585 int regValue = result ;
586 return (int)(regValue);
587 }
588 public short readI2CConfig_Address()
589 {
590
591 int result = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
592 int regValue = result ;
593 int bitfieldValue = ((regValue & kI2CConfig_Address_BitfieldMask) >>> kI2CConfig_Address_BitfieldOffset);
594 return (short)((bitfieldValue) & 0x000000FF);
595 }
596 public byte readI2CConfig_BytesToRead()
597 {
598
599 int result = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
600 int regValue = result ;
601 int bitfieldValue = ((regValue & kI2CConfig_BytesToRead_BitfieldMask) >>> kI2CConfig_BytesToRead_BitfieldOffset);
602 return (byte)((bitfieldValue) & 0x00000007);
603 }
604 public byte readI2CConfig_BytesToWrite()
605 {
606
607 int result = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
608 int regValue = result ;
609 int bitfieldValue = ((regValue & kI2CConfig_BytesToWrite_BitfieldMask) >>> kI2CConfig_BytesToWrite_BitfieldOffset);
610 return (byte)((bitfieldValue) & 0x00000007);
611 }
612 public int readI2CConfig_DataToSendHigh()
613 {
614
615 int result = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
616 int regValue = result ;
617 int bitfieldValue = ((regValue & kI2CConfig_DataToSendHigh_BitfieldMask) >>> kI2CConfig_DataToSendHigh_BitfieldOffset);
618 return (int)((bitfieldValue) & 0x0000FFFF);
619 }
620 public boolean readI2CConfig_BitwiseHandshake()
621 {
622
623 int result = NiFpga.readU32(m_DeviceHandle, kI2CConfig_Addresses[m_SystemIndex], status);
624 int regValue = result ;
625 int bitfieldValue = ((regValue & kI2CConfig_BitwiseHandshake_BitfieldMask) >>> kI2CConfig_BitwiseHandshake_BitfieldOffset);
626 return ((bitfieldValue) != 0 ? true : false);
627 }
628
629 //////////////////////////////////////////////////////////////////////////////////////////////////
630 // Accessors for DO_PWMConfig
631 //////////////////////////////////////////////////////////////////////////////////////////////////
632 private static final int kDO_PWMConfig_PeriodPower_BitfieldMask = 0x000F0000;
633 private static final int kDO_PWMConfig_PeriodPower_BitfieldOffset = 16;
634 private static final int kDO_PWMConfig_OutputSelect_0_BitfieldMask = 0x0000F000;
635 private static final int kDO_PWMConfig_OutputSelect_0_BitfieldOffset = 12;
636 private static final int kDO_PWMConfig_OutputSelect_1_BitfieldMask = 0x00000F00;
637 private static final int kDO_PWMConfig_OutputSelect_1_BitfieldOffset = 8;
638 private static final int kDO_PWMConfig_OutputSelect_2_BitfieldMask = 0x000000F0;
639 private static final int kDO_PWMConfig_OutputSelect_2_BitfieldOffset = 4;
640 private static final int kDO_PWMConfig_OutputSelect_3_BitfieldMask = 0x0000000F;
641 private static final int kDO_PWMConfig_OutputSelect_3_BitfieldOffset = 0;
642 private static final int kDIO0_DO_PWMConfig_Address = 0x8270;
643 private static final int kDIO1_DO_PWMConfig_Address = 0x82DC;
644 private static final int kDO_PWMConfig_Addresses [] =
645 {
646 kDIO0_DO_PWMConfig_Address,
647 kDIO1_DO_PWMConfig_Address,
648 };
649
650 public void writeDO_PWMConfig(final int value)
651 {
652
653 NiFpga.writeU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], value, status);
654 }
655 public void writeDO_PWMConfig_PeriodPower(final int value)
656 {
657
658 int regValue = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
659 regValue &= ~kDO_PWMConfig_PeriodPower_BitfieldMask;
660 regValue |= ((value) << kDO_PWMConfig_PeriodPower_BitfieldOffset) & kDO_PWMConfig_PeriodPower_BitfieldMask;
661 NiFpga.writeU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], regValue, status);
662 }
663 public void writeDO_PWMConfig_OutputSelect_0(final int value)
664 {
665
666 int regValue = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
667 regValue &= ~kDO_PWMConfig_OutputSelect_0_BitfieldMask;
668 regValue |= ((value) << kDO_PWMConfig_OutputSelect_0_BitfieldOffset) & kDO_PWMConfig_OutputSelect_0_BitfieldMask;
669 NiFpga.writeU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], regValue, status);
670 }
671 public void writeDO_PWMConfig_OutputSelect_1(final int value)
672 {
673
674 int regValue = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
675 regValue &= ~kDO_PWMConfig_OutputSelect_1_BitfieldMask;
676 regValue |= ((value) << kDO_PWMConfig_OutputSelect_1_BitfieldOffset) & kDO_PWMConfig_OutputSelect_1_BitfieldMask;
677 NiFpga.writeU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], regValue, status);
678 }
679 public void writeDO_PWMConfig_OutputSelect_2(final int value)
680 {
681
682 int regValue = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
683 regValue &= ~kDO_PWMConfig_OutputSelect_2_BitfieldMask;
684 regValue |= ((value) << kDO_PWMConfig_OutputSelect_2_BitfieldOffset) & kDO_PWMConfig_OutputSelect_2_BitfieldMask;
685 NiFpga.writeU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], regValue, status);
686 }
687 public void writeDO_PWMConfig_OutputSelect_3(final int value)
688 {
689
690 int regValue = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
691 regValue &= ~kDO_PWMConfig_OutputSelect_3_BitfieldMask;
692 regValue |= ((value) << kDO_PWMConfig_OutputSelect_3_BitfieldOffset) & kDO_PWMConfig_OutputSelect_3_BitfieldMask;
693 NiFpga.writeU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], regValue, status);
694 }
695 public int readDO_PWMConfig()
696 {
697
698 int result = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
699 int regValue = result ;
700 return (int)(regValue);
701 }
702 public byte readDO_PWMConfig_PeriodPower()
703 {
704
705 int result = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
706 int regValue = result ;
707 int bitfieldValue = ((regValue & kDO_PWMConfig_PeriodPower_BitfieldMask) >>> kDO_PWMConfig_PeriodPower_BitfieldOffset);
708 return (byte)((bitfieldValue) & 0x0000000F);
709 }
710 public byte readDO_PWMConfig_OutputSelect_0()
711 {
712
713 int result = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
714 int regValue = result ;
715 int bitfieldValue = ((regValue & kDO_PWMConfig_OutputSelect_0_BitfieldMask) >>> kDO_PWMConfig_OutputSelect_0_BitfieldOffset);
716 return (byte)((bitfieldValue) & 0x0000000F);
717 }
718 public byte readDO_PWMConfig_OutputSelect_1()
719 {
720
721 int result = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
722 int regValue = result ;
723 int bitfieldValue = ((regValue & kDO_PWMConfig_OutputSelect_1_BitfieldMask) >>> kDO_PWMConfig_OutputSelect_1_BitfieldOffset);
724 return (byte)((bitfieldValue) & 0x0000000F);
725 }
726 public byte readDO_PWMConfig_OutputSelect_2()
727 {
728
729 int result = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
730 int regValue = result ;
731 int bitfieldValue = ((regValue & kDO_PWMConfig_OutputSelect_2_BitfieldMask) >>> kDO_PWMConfig_OutputSelect_2_BitfieldOffset);
732 return (byte)((bitfieldValue) & 0x0000000F);
733 }
734 public byte readDO_PWMConfig_OutputSelect_3()
735 {
736
737 int result = NiFpga.readU32(m_DeviceHandle, kDO_PWMConfig_Addresses[m_SystemIndex], status);
738 int regValue = result ;
739 int bitfieldValue = ((regValue & kDO_PWMConfig_OutputSelect_3_BitfieldMask) >>> kDO_PWMConfig_OutputSelect_3_BitfieldOffset);
740 return (byte)((bitfieldValue) & 0x0000000F);
741 }
742
743 //////////////////////////////////////////////////////////////////////////////////////////////////
744 // Accessors for I2CStart
745 //////////////////////////////////////////////////////////////////////////////////////////////////
746 private static final int kDIO0_I2CStart_Address = 0x8248;
747 private static final int kDIO1_I2CStart_Address = 0x82B4;
748 private static final int kI2CStart_Addresses [] =
749 {
750 kDIO0_I2CStart_Address,
751 kDIO1_I2CStart_Address,
752 };
753
754 public void strobeI2CStart()
755 {
756
757 NiFpga.writeU32(m_DeviceHandle, kI2CStart_Addresses[m_SystemIndex], 1, status);
758 }
759
760
761 //////////////////////////////////////////////////////////////////////////////////////////////////
762 // Accessors for LoopTiming
763 //////////////////////////////////////////////////////////////////////////////////////////////////
764 private static final int kDIO_LoopTiming_Address = 0x8200;
765
766 public static int readLoopTiming()
767 {
768
769 return (int)((NiFpga.readU32(m_DeviceHandle, kDIO_LoopTiming_Address, status)) & 0x0000FFFF);
770 }
771
772 //////////////////////////////////////////////////////////////////////////////////////////////////
773 // Accessors for PWMConfig
774 //////////////////////////////////////////////////////////////////////////////////////////////////
775 private static final int kPWMConfig_Period_BitfieldMask = 0xFFFF0000;
776 private static final int kPWMConfig_Period_BitfieldOffset = 16;
777 private static final int kPWMConfig_MinHigh_BitfieldMask = 0x0000FFFF;
778 private static final int kPWMConfig_MinHigh_BitfieldOffset = 0;
779 private static final int kDIO_PWMConfig_Address = 0x8204;
780
781 public static void writePWMConfig(final int value)
782 {
783
784 NiFpga.writeU32(m_DeviceHandle, kDIO_PWMConfig_Address, value, status);
785 }
786 public static void writePWMConfig_Period(final int value)
787 {
788
789 int regValue = NiFpga.readU32(m_DeviceHandle, kDIO_PWMConfig_Address, status);
790 regValue &= ~kPWMConfig_Period_BitfieldMask;
791 regValue |= ((value) << kPWMConfig_Period_BitfieldOffset) & kPWMConfig_Period_BitfieldMask;
792 NiFpga.writeU32(m_DeviceHandle, kDIO_PWMConfig_Address, regValue, status);
793 }
794 public static void writePWMConfig_MinHigh(final int value)
795 {
796
797 int regValue = NiFpga.readU32(m_DeviceHandle, kDIO_PWMConfig_Address, status);
798 regValue &= ~kPWMConfig_MinHigh_BitfieldMask;
799 regValue |= ((value) << kPWMConfig_MinHigh_BitfieldOffset) & kPWMConfig_MinHigh_BitfieldMask;
800 NiFpga.writeU32(m_DeviceHandle, kDIO_PWMConfig_Address, regValue, status);
801 }
802 public static int readPWMConfig()
803 {
804
805 int result = NiFpga.readU32(m_DeviceHandle, kDIO_PWMConfig_Address, status);
806 int regValue = result ;
807 return (int)(regValue);
808 }
809 public static int readPWMConfig_Period()
810 {
811
812 int result = NiFpga.readU32(m_DeviceHandle, kDIO_PWMConfig_Address, status);
813 int regValue = result ;
814 int bitfieldValue = ((regValue & kPWMConfig_Period_BitfieldMask) >>> kPWMConfig_Period_BitfieldOffset);
815 return (int)((bitfieldValue) & 0x0000FFFF);
816 }
817 public static int readPWMConfig_MinHigh()
818 {
819
820 int result = NiFpga.readU32(m_DeviceHandle, kDIO_PWMConfig_Address, status);
821 int regValue = result ;
822 int bitfieldValue = ((regValue & kPWMConfig_MinHigh_BitfieldMask) >>> kPWMConfig_MinHigh_BitfieldOffset);
823 return (int)((bitfieldValue) & 0x0000FFFF);
824 }
825
826
827 //////////////////////////////////////////////////////////////////////////////////////////////////
828 // Accessors for PWMValue
829 //////////////////////////////////////////////////////////////////////////////////////////////////
830 public static final int kPWMValue_NumRegisters = 10;
831 private static final int kDIO0_PWMValue0_Address = 0x8214;
832 private static final int kDIO0_PWMValue1_Address = 0x8218;
833 private static final int kDIO0_PWMValue2_Address = 0x821C;
834 private static final int kDIO0_PWMValue3_Address = 0x8220;
835 private static final int kDIO0_PWMValue4_Address = 0x8224;
836 private static final int kDIO0_PWMValue5_Address = 0x8228;
837 private static final int kDIO0_PWMValue6_Address = 0x822C;
838 private static final int kDIO0_PWMValue7_Address = 0x8230;
839 private static final int kDIO0_PWMValue8_Address = 0x8234;
840 private static final int kDIO0_PWMValue9_Address = 0x8238;
841 private static final int kDIO1_PWMValue0_Address = 0x8280;
842 private static final int kDIO1_PWMValue1_Address = 0x8284;
843 private static final int kDIO1_PWMValue2_Address = 0x8288;
844 private static final int kDIO1_PWMValue3_Address = 0x828C;
845 private static final int kDIO1_PWMValue4_Address = 0x8290;
846 private static final int kDIO1_PWMValue5_Address = 0x8294;
847 private static final int kDIO1_PWMValue6_Address = 0x8298;
848 private static final int kDIO1_PWMValue7_Address = 0x829C;
849 private static final int kDIO1_PWMValue8_Address = 0x82A0;
850 private static final int kDIO1_PWMValue9_Address = 0x82A4;
851 private static final int kPWMValue_Addresses [] =
852 {
853 kDIO0_PWMValue0_Address,
854 kDIO0_PWMValue1_Address,
855 kDIO0_PWMValue2_Address,
856 kDIO0_PWMValue3_Address,
857 kDIO0_PWMValue4_Address,
858 kDIO0_PWMValue5_Address,
859 kDIO0_PWMValue6_Address,
860 kDIO0_PWMValue7_Address,
861 kDIO0_PWMValue8_Address,
862 kDIO0_PWMValue9_Address,
863 kDIO1_PWMValue0_Address,
864 kDIO1_PWMValue1_Address,
865 kDIO1_PWMValue2_Address,
866 kDIO1_PWMValue3_Address,
867 kDIO1_PWMValue4_Address,
868 kDIO1_PWMValue5_Address,
869 kDIO1_PWMValue6_Address,
870 kDIO1_PWMValue7_Address,
871 kDIO1_PWMValue8_Address,
872 kDIO1_PWMValue9_Address,
873 };
874
875 public void writePWMValue(final int reg_index, final int value)
876 {
877 if (status.isNotFatal() && reg_index >= kPWMValue_NumRegisters)
878 {
879 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
880 }
881
882 NiFpga.writeU32(m_DeviceHandle, kPWMValue_Addresses[m_SystemIndex * kPWMValue_NumRegisters + reg_index], value, status);
883 }
884 public short readPWMValue(final int reg_index)
885 {
886 if (status.isNotFatal() && reg_index >= kPWMValue_NumRegisters)
887 {
888 status.setStatus(NiRioStatus.kRIOStatusBadSelector);
889 }
890
891 return (short)((NiFpga.readU32(m_DeviceHandle, kPWMValue_Addresses[m_SystemIndex * kPWMValue_NumRegisters + reg_index], status)) & 0x000000FF);
892 }
893
894
895
896 }